We will be discussing power integrity issues, root causes, and countermeasures in sensitive electronic designs. Demonstrating best design & test practices and solutions we will be supporting electronic design engineers effectively and efficiently powering their devices and systems. Measurements in the time & frequency domains provide detailed insights in the design verification.
Attendees will be learning the impact of noise, jitter, impedance, etc. and examples to detect those sources of power integrity failures. We will be discussing methods to reduce respectively compensate those sources and demonstrating oscilloscope and vector network analyzer solutions engineers benefit from for their design verification.