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Techniques to Accelerate Data Fusion in your SoC: High-Performance Sensor, Voice and Audio Processing



Web event: Techniques to Accelerate Data Fusion in your SoC: High-Performance Sensor, Voice and Audio Processing
Date: May 25, 2017
Time:09:00 AM PDT
Duration: 60 minutes

The fusion of sensor data, voice, audio and biometrics are constantly increasing the processing requirements for applications in mobile, automotive and IoT markets. Next-generation digital sensors will require higher bandwidths provided by interfaces such as MIPI I3C, and more advanced voice detection and speech recognition algorithms are driving the development of progressively more complex embedded ICs. Integrated IP subsystems with pre-verified hardware and software allow designers to incorporate and efficiently process data from the increasingly wide array of fusion elements found in low-power systems. These IC building blocks allow you to quickly integrate data fusion processing functionality into your system and optimize it for your specific application.


You will learn:
  • About market trends in IoT applications requiring the fusion of multiple sensing elements and how they are increasing system complexity.
  • How these new processing requirements can effectively be addressed with an integrated, pre-verified processor based subsystem.
  • How tightly coupling a DesignWare® ARC® EM DSP processor with memories, peripherals, and hardware accelerators provides critical functionality, boosts performance efficiency and reduces power consumption compared to discrete solutions.


Who should attend: Design engineers, managers and system architects who are developing SoCs for automotive, mobile, industrial and IoT applications that require advanced data fusion - combining elements such as high performance digital sensors, voice detection, speech recognition, biometrics (gesture, face detect) and audio
playback.


Speakers:

Rich Collins
Product Manager for ARC Processors and Subsystems, Synopsys

Rich Collins is the product marketing manager for IP subsystems at Synopsys. In this role, he is responsible for developing strategies and positioning for market penetration and growth of ARC processors and ARC-based subsystems within the DesignWare IP portfolio.Rich is an industry veteran with over 20 years of experience in embedded semiconductor R&D, product marketing and business development. Before joining Synopsys, he spent 17 years at Motorola/Freescale, where he held several technical and managerial roles within CPU, IP and SoC design and marketing teams across the company. Rich holds an MBA from Duke University's Fuqua School of Business as well as a BSE in Electrical Engineering from Duke University, where he also majored in Computer Science and Spanish.




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