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ANSYS Presents: How to Use RedHawk 2014 for Power Noise and Reliability Sign-off of FinFET Based Designs

Event Date: On Demand

PRESENTER: Calvin Chow, Area Technical Manager



Calvin Chow is an Area Technical Manager at ANSYS subsidiary, Apache Design. He brings over 12 years of industry expertise in the semiconductor space in both design and EDA. Since joining Apache in 2009 he has helped designers address their power delivery network design challenges using the RedHawk and Totem Power Analysis platforms. Prior to Apache, Calvin worked in microprocessor design at Sun Microsystems, followed by a transition into applications engineering at Magma Design Automation.

WHAT IS COVERED?

This webinar will cover new capabilities in RedHawk 2014 that enable power noise and reliability sign-off for large FinFET based designs with the same accuracy as “flat” simulation. The key capabilities that will be covered are:
  • Distributed Machine Processing (DMP)
  • Chip-Package Co-Analysis (RH-CPA)
  • Temperature-aware EM methodology
MAIN PRODUCTS COVERED: RedHawk 2014

WHO SHOULD VIEW?
Designers and managers of SoC designs using/planning to use FinFET based process technologies.
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