Automated DRC Waiver Management

This paper explains the Calibre Auto-Waiver product, and discusses how the auto-waiver process significantly reduces the time and risks associated with implementing third-party IP. Integration of third-party intellectual property (IP) into integrated circuit (IC) designs has always been a potential time trap for IC designers. IP design rule violations that were waived by the foundry show up during IC verification without any indication as to their waived status. The IC designer has no choice but to analyze and resolve these errors just like any other, wasting significant manhours and cycle time. Calibre Auto-Waiver, Calibre nmDRC's automated waiver management capability, provides IP designers with automated identification of design rule violations granted waiver status during IP development. During integration of the IP into larger designs, IC designers can use Calibre Auto-Waiver to recognize and remove these errors during design rule checking (DRC), avoiding the need to analyze and debug waived errors. In addition, Calibre Auto-Waiver identifies any waived errors that fall into "marginal" waiver status, allowing the IC designer to investigate these errors as needed to ensure manufacturability. After DRC is complete, Calibre Auto-Waiver enables the designer to quickly review the waiver status of all IP errors, as final assurance that no IP error has been overlooked.

Free Trial Software: NanoCrypto for Embedded Systems

Download this product documentation, and we'll send you a FREE trial copy of Mocana's NanoCrypto(tm) software developers' kit. NanoCrypto is a sophisticated, government-certified cryptographic engine, purpose built for difficult and resource-constrained embedded systems environments. Mocana's core cryptographic engine secures millions of devices from hundreds of technology manufactures worldwide. It is, quite simply, one of the smallest, fastest and most comprehensive cryptographic cores on the market. On platforms that support hardware offload of crypto jobs, NanoCrypto's low host CPU utilization extends battery life on handheld devices and remote sensors, while enabling even the most humble processors to use robust cryptographic techniques to protect sensitive information from disclosure and authenticate legitimate users, systems and data. NanoCrypto is written entirely in C, and assembly optimizations are available for several popular hardware platforms, including PowerQUICC, ARM, PowerPC, MIPS, Coldfire, H8S and x86. Best of all, it's highly portable and supports over 30 operating systems and RTOS's out of the box. You can even use it in environments without any OS at all. NanoCrypto enables sophisticated developers to work directly with cryptographic primitives to build confidentiality, integrity and authentication features directly into their devices. RESTRICTIONS: US export regulations prohibit us from sending cryptographic source code to certain countries (for example: Syria, North Korea) so this free trial may not be available in your country. Sorry, this special offer is not available to students or faculty of educational institutions, public or private.

Developing a Complete Critical Feature Analysis Solution—Part 1: What Is CFA and Why Do I Need It?

Critical Feature Analysis (CFA) is a data analysis solution for understanding the impact and priority of recommended rule compliance issues in a design. CFA is one part of a comprehensive design for manufacturing (DFM) design flow. This five-part paper series examines the conditions that led to the development of recommended rules, and describes the process by which automated design analysis and rule verification can help designers optimize designs to the fullest and most efficient use of area, while still ensuring manufacturability. Part 1 explains the use of recommended rules and introduces the basic concepts of CFA.

Pulse Testing for Nanoscale Devices

Nanotechnology research works with matter at the molecular level, atom by atom, to create structures with fundamentally new properties. In particular, the field of nanoelectronics is developing especially rapidly with potential impact across a wide range of industries. Nanoelectronics research today includes devices that utilize carbon nanotubes, semiconductor nanowires, molecular organic-based electronics, and single-electron devices. Unfortunately, these smaller devices can't be tested using standard test techniques for a number of reasons. One key reason is the physical size of the devices. The nanoscale dimensions of some of the new 'beyond CMOS' devices can be susceptible to damage from even small amounts of current used in the measurement process. In addition, traditional DC test techniques are not always adequate to reveal how devices really operate. Consequently, designers need new testing techniques and test tools. One such technique is pulse testing, and it is essential for the new generation of nanoelectronic devices.

Restrictive Design Rules and Their Impact on 22 nm Design and Physical Verification

Process variability is posing considerable challenge to the capability of lithography and manufacturing techniques, and thus impacts both performance and yield of advanced node chips. To ensure the manufacturability and performance of chips at 22 nm, one approach the industry is considering is restrictive design-limiting the type and placement of features used in designs. Gridding of critical layers significantly reduces the total physical design space available and makes restrictive design possible. This paper will examine the basics of gridding, the requirements for restrictive gridded design, and the automated methods for accurate checking of Restrictive Design Rules (RDRs). Resolving the debug challenges associated with the implementation of checking restrictive design and grid rules will also be discussed.

Build versus Buy - Understanding the Total Cost of Embedded Design

When developing an embedded system, deciding which technology to implement as the system's primary controller is one of the first key engineering milestones. In addition to considering processor architectures, operating system capabilities, and other components, you must decide which portion of the system to design and which portion to buy off the shelf. By designing and building a custom controller, you can completely customize the end solution and optimize costs, but any design specification changes or oversights can cause lengthy and expensive delays. Alternatively, using an off-the-shelf platform increases the cost of goods sold (COGS), and you may pay for features that are not necessary for your design. Nevertheless, off-the-shelf systems typically offer a faster validation cycle and, therefore, shorter time to market. This tutorial outlines two options for developing a new controller - build or buy - and discusses the technical and financial risks associated with both.

Smarter System Development: A systems engineering study to support green initiatives with model driven development

Smarter system development: a systems engineering trade study to support green initiatives with model-driven development. They're essential parts of the systems engineering process. Trade studies help us fully explore the design space to ensure that a proposed solution best meets conflicting performance and cost requirements. But many of us don't know that you can analytically and objectively conduct your trade studies well before you engineer anything. Using a model-driven approach with IBM Rational(r) Rhapsody(r) software, you can determine which solution will best capture stakeholder requirements while also justifying your engineering decisions. This paper describes a multivariable decision problem based upon the selection of a power source for an environmentally conscious but cost-effective family-size vehicle for the European/United Kingdom (U.K.) marketplace.

Protecting RS-485 Interfaces Against Lethal Electrical

This article provides an overview of the three most commonly applied transient immunity tests, and provides recommendations on how to protect network nodes against real world transients.

Multiphysics Simulation Software

Simulation in engineering and science aims for results that closely predict real-world behavior. In this paper, we trace the development of simulation technology in conjunction with advances in computer hardware and algorithms. Of particular interest is how the coupling of multiple physics models, that is, "multiphysics", as the next step in the evolution of simulation, is becoming standard practice. Three case studies demonstrate the effectiveness of the multiphysics approach in producing more reliable and realistic models. A benchmark study is also reviewed, providing metrics that emphasize verification and validation of varying multiphysics platforms.

Designing & Optimizing Battery Systems for Mission-Critical Portable Applications

This white paper outlines electrical engineering guidelines for both battery packs and portable devices. Topics include battery chemistry options (alkaline, lead acid, nickel and lithium), cell configurations, battery pack characteristics, "smart" battery management, fuel gauges, battery pack authentication, charging options, and safety considerations. This paper also provides insight into power management considerations for the portable device. In summary, this white paper lays out all the parameters and options one should consider before designing a portable device or battery pack.

Selecting an Industry-Standard Metric for Data Center Efficiency

The development of standards for the measurement and specification of data center efficiency is an essential step in the global effort to reduce the environmental impact of data centers. This paper explains some of the metrics that have been used to describe the efficiency of data center physical infrastructure and suggests which metric is the most effective.

Equalization of Multiple Interleaved Anaglog-to-Digital Converter (ADCs)

Multiple ADCs are a popular war to increase a system's sampling rate. This document discusses how to implement digital equalizers to improve performance.

Delivering during the Downturn- Engineering Management Execution Strategies at top IC Companies

An Interview w/ Ron Collett, Numetrics CEO

Go Beyond Compliance for Profitability and Environmental Sustainability

Forward thinking Fortune 500 CEOs find that environmental sustainability strategies are delivering significant benefits to their bottom line. Analyst reports confirm that pro-green policies and practices, coupled with a Product Lifecycle Management (PLM) strategy, are competitive differentiators. Eco-design is based on a strategy that considers the environmental impact of a product's design throughout its lifecycle, combining environmental sustainability and profitability. The financial and environmental benefit of eco-design reaches its full potential when used in conjunction with product development processes implemented through PLM. PLM enables companies to manage information about their products within a single information environment.

This whitepaper addresses how a PLM strategy helps companies achieve profitability targets while meeting global compliance regulations and helping the environment.